By definition, the WDT must reach the end of a predetermined time interval before it resets the processor. In a properly designed system, this reset will correct the original error.Īlso note that a WDT cannot detect a fault instantaneously. After the timeout interval, the watchdog will cause a processor reset. When the processor begins executing this bad code, it will not properly execute the code that services the watchdog. Potentially, the processor could begin executing operands instead of op codes. When this bit error occurs while fetching program information, the microprocessor will begin to execute erroneous code. These bit errors cause temporary bit-polarity flipping of data into and out of the embedded processor. Momentary bit errors are caused by interruptions, including soft memory failures and EMI discharges into memory devices and their interfaces. If the loop fails to execute properly for any reason, the watchdog will fire and the device will be reset.Ī system with a WDT is particularly well-suited to detecting bit errors. The WDT is then reset once at the top of the loop. Generally, embedded software has a 'main loop' which calls into several subroutines that direct a variety of activities. Preventing microprocessor lockup is a typical application for a WDT. This article examines some considerations for selecting the best timer for an application.

Such states can be as simple as a toggled register bit caused by a software bug, a cosmic ray, or an event such as EMI (electromagnetic interference). A watchdog timer (WDT) forces an embedded microprocessor or microcontroller to reset (hardware reset) in response to an invalid software state.

Watchdog definition